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PCB layout

Extensive knowledge from analog till high–speed digital designs
Signal Integrity analysis

Pre- and post-layout SI and crosstalk analysis
Power Integrity analysis

Current distribution and power plane noise analysis
Timing analysis

Verify the timing constraints of a DDRx interface

News

Sintecs start System on Module development in Dutch press
News

Sintecs launched a new website (press release link will follow soon)
News

System on module press release in Dutch magazine engineers online
Events

Electronics & Automation 2013
May 28, 29 and 30, 2013
Events

Signal Integrity and High Speed Methodology Training
November 2, 3 and 4, 2013
Events

Embedded world 2014
February 25–27, 2014

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Signal Integrity analysis
PCB layout
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System on Module
SX5
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